SFN: let's limit Asia's monopoly of high-performance chips

With the wafer production process developed by the UK-based Search for the Next, the monopoly of Taiwanese and Korean chipmakers could be downsized

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David Summerland SFN chip

Search for the Next (SFN) is the company that, established in 2017 and based in Nottingham at the Ingenuity Building at the University of Nottingham Business Park, developed the process for manufacturing Bizen wafers with Zpolar transistors based on the Zpolar Tunnel Logic (ZTL).

The Bizen process applies quantum mechanical principles to any wafer processing technology. Bizen ZTL chips require significantly fewer processing layers, enabling the production of complex devices in wafer factories from large geometries around the world.

Although this is a new technology, the process is executable using standard CMOS logic-based integrated circuit production facilities. It has been under development in a British wafer factory for four years, and SFN has produced test wafers that represent a reliable reference and have been characterized. The extracted characterization data were transferred to a JMP data book and used to produce SPICE models executable in the Cadence design environment; the results match those obtained from the Synopsis wafer manufacturing process flow.

SFN's Infrastructure Time Machines.

SFN has just created a family of four Infrastructure Time Machine (ITM), or process nodes, that enable chip designers to make integrated circuits in older wafer factories, for 180-nm or even 1-micron geometries, with performance equivalent to CMOS logic-based ICs fabricated in state-of-the-art facilities. In SFN's view, using the expression 'Time Machine' perfectly gives the idea of what the manufacturing process in question enables: by employing this technology, IC designers can go back 10 years in time in terms of fabrication capability and then forward 10 years-or more-in terms of performance because of the ZTL devices they create.

For example, a wafer factory equipped with 180-nm steppers--such as the one in Newport, Britain's largest semiconductor plant and currently at the center of a political and commercial war concerning the proposed divestiture to foreign companies--could now produce ZTL devices with performance (size and speed) equal to that of 35-nm CMOS by implementing ITM35...and at a hugely reduced cost. David Summerland, Ceo of SFN , explains, "Before the Bizen process, the Zpolar transistor and ZTL logic were available, high-performance chips such as 5G and RISC-V could only be produced in plants such as those of the Taiwanese giant TSMC, which controls most of the high-performance semiconductor manufacturing. Now, U.K. wafer factories and others in the Western world can be competitive again, and even outperform the Taiwanese and Korean giants, while at the same time best securing national interests."

The four ITMs are:

  • ITM180, which enables ZTL chips with the performance of 180-nm CMOS chips using 1-micron implants;
  • ITM35, which enables the production of 35-nm CMOS-equivalent integrated circuits in wafer factories with 180-nm process nodes;
  • ITM5, which achieves performance equivalent to 5-nm CMOS ICs using 28-nm steppers;
  • ITMSubnm, which will enable current state-of-the-art 3-nm wafer factories to achieve extraordinary sub-nanometer sizes, that is, on the order of a few angstroms.

In the selected ITM, VHDL is used, to obtain both the Process Of Reference (POR) and GDSii so that wafer factories can produce the resulting integrated circuit. The infographic shows this process.

"We know that advances in CMOS technology will extend until at least 2036 with device geometries shrinking to 2 angstroms," Summerland says further. "It is important to keep in mind that CMOS denotes a logic, MOS a type of transistor. CFETs are also made by stacking nMOS and pMOS. Bizen/ZTL technology is a huge step forward and will make other complex approaches redundant. Zpolar transistors do not depend on the unipolar structure of CMOS, taking advantage instead of inherently instantaneous input and minimized vertical dimensions. Because ICs are so much simpler to manufacture and/or more chips per wafer can be fabricated, we are also solving the semiconductor crisis while eliminating our foreign dependence."


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