Interference mitigation in multicore avionics systems: Green Hills Software takes care of it

Green Hills Software has extended its DO-178C Level A multi-core interference mitigation system to Arm® Cortex® -A72 processors.

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interference avionics systems green hills software

Multicore interference occurs when multiple processor cores attempt to access the same shared resource, such as memory, shared cache, input/output devices, or on-chip interconnects. This is a particularly serious issue, to which a separate section of Position Paper of Team Software for Certification Authorities (CAST-32A)which identifies critical areas relating to the security, performance and integrity of software operating in a multicore avionics system.

BAM functionality in operating systems

Green Hills Software recognised the problem of multicore interference early on and began investing in a solution back in 2010: the DAL-A-compliant Bandwidth Allocation and Monitoring (BAM) feature monitors and enforces bandwidth allocation for chip-level interconnection on each of the cores. It emulates a high-speed hardware approach to ensure cores have a continuous allocation of shared multicore resources. This contrasts with the 'secure network' approach with coarse-grained thresholds and fault detection to terminate or suspend malicious processes.

The BAM function adjusts the bandwidth evenly across the application's execution time window, thereby allowing other applications operating in the same time window to acquire their allocated portions of the shared resources.

"Green Hills Software has led the development of multicore interference mitigation with DAL-A compliant solutions for multiple multicore architectures," said Dan O'Dowd, founder and CEO of Green Hills Software. "No real time operating system vendor, other than Green Hills Software, provides a DO-178C Level A compliant solution for multicore interference mitigation that can meet CAST-32A requirements."

The extension of the interference mitigation system 

Green Hills Software has extended its DO-178C Level A-compliant multicore interference mitigation system to Arm® Cortex® -A72 processors. As part of the Integrity®-178 Time-Variant Unified Multi-Processing (TUMP™) real-time operating system, the BAM feature enables software architects to allocate and enforce bandwidth limits for shared resources on each processor core, effectively mitigating interference and minimising worst-case execution time (WCET) in multicore processing.

Combined with Green Hills Software's multicore WCET utility libraries for specific SoCs, the BAM feature ensures that critical partitions meet required deadlines, allowing other partitions of lower criticality to run simultaneously on other cores without impacting critical applications. This remains true even if other partitions are changed or when new partitions are introduced into the system. This is an essential capability for the support and development of critical systems based on multicore architectures.

The operating system of Green Hills Software

The Integrity-178 tuMP real-time operating system for safety and security critical applications has been designed to simultaneously meet the DO-178C standard at Design Assurance Level (DAL) and the Separation Kernel Protection Profile (SKPP v1.03) as defined by the NSA. Integrity-178 tuMP supports any combination of Asymmetric Multi-Processing (AMP), Symmetric Multi-Processing (SMP), and Bound Multi-Processing (BMP) architecture. In particular, it includes support for running a multi-threaded DAL A DO-178C partition on multiple processor cores in a BMP configuration as required by the ARINC 653 Part 1 specification, supplements 4 and 5, and also SMP configurations as required in ARINC 653 Part 2 Multicore Service Extensions, supplements 3 and 4. Green Hills Software's system was the first to be certified compliant with the FACE™ technical standard, edition 3.0, and remains the only compliant system for all three avionics processor architectures: Arm, Intel® and Power Architecture.

 

 

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